1. Field of the Invention
The present invention relates to the structure of a semiconductor device. In particular, the present invention relates to the structure of an active matrix semiconductor device having a thin film transistor (hereinafter referred to as TFT) manufactured on an insulator such as glass or plastic. Further, the present invention relates to electronic equipment using this type of semiconductor device as a display portion.
2. Description of the Related Art
The development of self-light emitting display devices such as electroluminescence (EL) display devices and FEDs (field emission displays) has become active in recent years. The advantages of the self-light emitting display devices include their high visibility, their ability to be made thinner because a back light which is necessary for liquid crystal display devices (LCDs) and the like is not needed, and that there are almost no limitations on their angle of view.
The term EL element indicates an element having a light emitting layer in which luminescence generated by the application of an electric field can be obtained. There are light emission when returning to a base state from a singlet excitation state (fluorescence), and light emission when returning to a base state from a triplet excitation state (phosphorescence) in the light emitting layer, and a semiconductor device of the present invention may use either of the aforementioned types of light emission.
EL elements normally have a laminate structure in which a light emitting layer is sandwiched between a pair of electrodes (anode and cathode). A laminate structure having “an anode, a hole transporting layer, a light emitting layer, an electron transporting layer, and a cathode”, proposed by Tang et al. of Eastman Kodak Company, can be given as a typical structure. This structure has extremely high efficiency light emission, and most of the EL elements currently being researched employ this structure.
Further, structures having the following layers laminated in order between an anode and a cathode also exist: a hole injecting layer, a hole transporting layer, a light emitting layer, and an electron transporting layer; and a hole injecting layer, a hole transporting layer, a light emitting layer, an electron transporting layer, and an electron injecting layer. Any of the above-stated structures may be employed as the EL element structure used in the semiconductor device of the present invention. Furthermore, fluorescent pigments and the like may also be doped into the light emitting layer.
All layers formed in EL elements between the anode and the cathode are referred to generically as “EL layers” in this specification. The aforementioned hole injecting layer, hole transporting layer, light emitting layer, electron transporting layer, and electron injecting layer are all included in the category of EL layers, and light emitting elements structured by an anode, an EL layer, and a cathode are referred to as EL elements.
The structure of a pixel in a general semiconductor device is shown in FIG. 5. Note that an EL display device is used as an example of a typical semiconductor device. The pixel shown in FIG. 5 has a source signal line 501, a gate signal line 502, a switching TFT 503, a driver TFT 504, a storage capacitor 505, an EL element 506, and electric power sources 507 and 508.
The connective relationship between each portion is explained. The TFTs have three terminals, a gate, a source, and a drain, but it is difficult to clearly differentiate the source and the drain here due to the TFT structure. The explanation regarding connectivity between the elements is therefore given with one electrode, the source or the drain, referred to as a first electrode, and the other electrode referred to as a second electrode. The terms source, drain, and the like are used, however, when giving explanations about on and off states of the TFTs, the electric potential of each terminal, and the like.
A gate electrode of the switching TFT 503 is connected to the gate signal line 502, and a first electrode of the switching TFT 503 is connected to the source signal line 501. A second electrode of the switching TFT 503 is connected to a gate electrode of the driver TFT 504. A first electrode of the driver TFT 504 is connected to the electric power source 507, and a second electrode of the driver TFT 504 is connected to one electrode of the EL element 506. The other electrode of the EL element 506 is connected to the electric power source 508. The storage capacitor 505 is connected between the gate electrode and the first electrode of the driver TFT 504, and stores the voltage between the gate and the source of the driver TFT 504.
If the electric potential of the gate signal line 502 changes and the switching TFT 503 turns on, then an image signal input to the source signal line 501 is input to the gate electrode of the driver TFT 504. The voltage between the gate and the source of the driver TFT 504, and the amount of electric current flowing between the source and the drain of the driver TFT 504 (hereinafter referred to as drain current), are determined in accordance with the electric potential of the input image signal. The electric current is supplied to the EL element 506, which emits light.
TFTs formed by using polysilicon (hereinafter referred to as P-Si) have a higher electric field mobility and a larger on current than TFTs formed by using amorphous silicon (hereinafter referred to as A-Si), and therefore are suitable as transistors used in semiconductor devices.
Conversely, TFTs formed by polysilicon have a problem point in that dispersion in their electrical characteristics occurs easily due to defects in their crystal grain boundaries.
If there is dispersion per pixel in characteristics such as the TFT threshold value and the on current when the TFTs structure pixels like the one shown in FIG. 5, then there is a large difference in the amount of the drain current in the TFT in response to the input image signal, even for cases in which the same image signal is input, and thus there is dispersion in the brightness of the EL elements 506.
In order to solve this type of problem, a desired amount of electric current may be supplied to the EL elements, without dependence upon the TFT characteristics. Therefore, various types of electric current write-in pixels that can control the size of the electric current flowing in the EL elements, without being influenced by the TFT characteristics, have thus been proposed.
The term electric current write-in denotes a method in which an image signal input to pixels using source signal lines is input by electric current as opposed to the normal input by analog or digital voltage information. The value of the electric current to be supplied to the EL elements is set by a signal electric current on the outside, and an equivalent electric current thereto is made to flow in the pixels. This has the advantage that there is no influence due to dispersion in the TFT characteristics.
Several examples of typical electric current write-in pixels are shown below, and explanations are given regarding their structure, operation, and characteristics.
An example of a first structure is shown in FIG. 6. The pixel of FIG. 6 has a source signal line 601, first to third gate signal lines 602 to 604, an electric current supply line 605, TFTs 606 to 609, a storage capacitor 610, an EL element 611, and a signal electric current input current source 612.
A gate electrode of the TFT 606 is connected to the first gate signal line 602, a first electrode of the TFT 606 is connected to the source signal line 601, and a second electrode of the TFT 606 is connected to: a first electrode of the TFT 607, a first electrode of the TFT 608, and a first electrode of the TFT 609. A gate electrode of the TFT 607 is connected to the second gate signal line 603, and a second electrode of the TFT 607 is connected to a gate electrode of the TFT 608. A second electrode of the TFT 608 is connected to the electric current supply line 605. A gate electrode of the TFT 609 is connected to the third gate signal line 604, and a second electrode of the 609 is connected to an anode of the EL element 611. The storage capacitor 610 is connected between the gate electrode and an input electrode of the TFT 608, and stores the voltage between a gate and a source of the TFT 608. Predetermined electric potentials are input to the electric current supply line 605 and a cathode of the EL element 611, and the two have a mutual electric potential difference.
Operation from write-in of a signal electric current to light emission is explained using FIGS. 7A to 7E. Reference numerals used within the figures denoting each portion are based on those of FIG. 6. FIGS. 7A to 7C show electric current flow schematically. FIG. 7D shows the relationship between the electric currents flowing in each pathway during write-in of the signal electric current, and FIG. 7E shows the voltage accumulating in the storage capacitor 610 during the same write-in of the signal electric current, namely the voltage between the gate and the source of the TFT 608.
First, pulses are input to the first gate signal line 602 and the second gate signal line 603, and the TFTs 606 and 607 turn on. The electric current flowing in the source signal line at this point, namely the signal electric current, is taken as Idata.
The electric current Idata flows in the source signal line, and therefore the electric current path within the pixel is divided into I1 and I2, as shown in FIG. 7A. The relationship between the two is shown in FIG. 7D. Note that Idata=I1+I2.
Electric charge is not yet stored in the storage capacitor 610 at the instant when the TFT 606 turns on, and therefore the TFT 608 is off. Consequently, I2=0, and Idata=I1. That is, electric current only flows due to the accumulation of electric charge in the storage capacitor 610 during this period.
Electric charge then accumulates gradually in the storage capacitor 610, and an electric potential difference starts to develop between both electrodes (see FIG. 7E). The TFT 608 turns on when the electric potential difference between both electrodes reaches Vth (point A in FIG. 7E), and I2 develops. Idata=I1+I2, as discussed above, and therefore I1 is gradually reduced. Electric current still flows, and in addition, electric charge accumulates in the storage capacitor.
Electric charge continues to accumulate in the storage capacitor 610 until the electric potential difference between both electrodes in the storage capacitor 610, namely the voltage between the gate and the source of the TFT 608, becomes a desired voltage, that is, becomes a voltage (VGS) at which the TFT 608 causes as much as possible for the electric current Idata to flow. When the accumulation of electric charge is then complete (point B in FIG. 7E), the electric current I2 stops flowing, and in addition, an electric current corresponding to VGS flows in the TFT 608 at this point, and Idata=I2 (see FIG. 7B). Signal write-in operations are thus complete. Selection of the first gate signal line 602 and the second gate signal line 603 is finally completed, and the TFTs 606 and 607 turn off.
Light emission operations are covered next. A pulse is input to the third gate signal line 604, and the TFT 609 turns on. The previously written in VGS is stored in the storage capacitor 610, and therefore the TFT 608 is on, and the electric current Idata flows from the electric current supply line 605. Thereby the EL element 611 emits light. If the TFT 608 is operated in the saturated region at this point, then Idata can continue to flow without changing, even if the voltage between the source and the drain of the TFT 608 changes.
FIG. 17 shows a second structure example. A pixel of FIG. 17 has a source signal line 1701, first to third gate signal lines 1702 to 1704, an electric current supply line 1705, TFTs 1706 to 1709, a storage capacitor 1710, an EL element 1711, and a current source for inputting signal electric current 1712.
A gate electrode of the TFT 1706 is connected to the first gate signal line 1702, a first electrode of the TFT 1706 is connected to the source signal line 1701, and a second electrode of the TFT 1706 is connected to a first electrode of the TFT 1708 and a first electrode of the TFT 1709. A gate electrode of the TFT 1708 is connected to the second gate signal line 1703, and a second electrode of the TFT 1708 is connected to the electric current supply line 1705. A gate electrode of the TFT 1707 is connected to the third gate signal line 1704, a first electrode of the TFT 1707 is connected to a gate electrode of the TFT 1709, and a second electrode of the TFT 1707 is connected to a second electrode of the TFT 1709 and one electrode of the EL element 1711. The storage capacitor 1710 is connected between the gate electrode and a first electrode of the TFT 1709, and stores a voltage between a gate and a source of the TFT 1709. Predetermined electric potentials are input to the electric current supply line 1705 and to the other electrode of the EL element 1711, which thus have a mutual electric potential difference.
Operation from write-in of a signal electric current through light emission is explained using FIGS. 18A to 18E. Reference numerals used within the figures denoting each portion are based on those of FIG. 17. FIGS. 18A to 18C show electric current flow schematically. FIG. 18D shows the relationship between the electric currents flowing in each pathway during write-in of the signal electric current, and FIG. 18E shows the voltage accumulating in the storage capacitor 1710 during the same write-in of the signal electric current, namely the voltage between the gate and the source of the TFT 1709.
First, pulses are input to the first gate signal line 1702 and the third gate signal line 1704, and the TFTs 1706 and 1707 turn on. The electric current flowing in the source signal line 1701 at this point, namely the signal electric current, is taken as Idata.
The electric current Idata flows in the source signal line 1701, and therefore the electric current path within the pixel is divided into I1 and I2, as shown in FIG. 18A. The relationship between the two is shown in FIG. 18D. Note that Idata=I1+I2.
Electric charge is not yet stored in the storage capacitor 1710 at the instant when the TFT 1706 turns on, and therefore the TFT 1709 is off. Consequently, I2=0, and Idata=I1. That is, electric current only flows due to the accumulation of electric charge in the storage capacitor 1710 during this period.
Electric charge then accumulates gradually in the storage capacitor 1710, and an electric potential difference starts to develop between both electrodes (see FIG. 18E). The TFT 1709 turns on when the electric potential difference between both electrodes reaches Vth (point A in FIG. 18E), and I2 develops. Idata=I1+I2, as discussed above, and therefore I1 is gradually reduced. Electric current still flows, and in addition, electric charge accumulates in the storage capacitor.
Electric charge continues to accumulate in the storage capacitor 1710 until the electric potential difference between both electrodes in the storage capacitor 1710, namely the voltage between the gate and the source of the TFT 1709, becomes a desired voltage, that is, becomes a voltage (VGS) at which the TFT 1709 causes as much as possible for the electric current Idata to flow. When the accumulation of electric charge is then complete (point B in FIG. 18E), the electric current I1 stops flowing, and in addition, an electric current corresponding to VGS flows in the TFT 1709 at this point, and Idata=I2 (see FIG. 18B). Signal write-in operations are thus complete. Selection of the first gate signal line 1702 and the third gate signal line 1704 is finally completed, and the TFTs 1706 and 1707 turn off.
A pulse is then input to the second gate signal line 1703, and the TFT 1708 turns on. The previously written in VGS is stored in the storage capacitor 1710 at this point, and therefore the TFT 1709 is on, and the electric current Idata flows from the electric current supply line 1705. The EL element 1711 thus emits light. If the TFT 1709 is operated in the saturated region at this point, then Idata can be made to flow without changing, even if there is some changes in the voltage between the source and the drain of the TFT 1709.
A third structure example is shown in FIG. 19. A pixel of FIG. 19 has a source signal line 1901, a first gate signal line 1902, a second gate signal line 1903, an electric current supply line 1904, TFTs 1905 to 1908, a storage capacitor 1909, an EL element 1910, and a current source for inputting signal electric current 1911.
A gate electrode of the TFT 1905 is connected to the first gate signal line 1902, a first electrode of the TFT 1905 is connected to the source signal line 1901, and a second electrode of the TFT 1906 is connected to a first electrode of the TFT 1906 and a first electrode of the TFT 1907. A gate electrode of the TFT 1906 is connected to the second gate signal line 1903, and a second electrode of the TFT 1906 is connected to a gate electrode of the TFT 1907 and a gate electrode of the TFT 1908. A second electrode of the TFT 1907 and a first electrode of the TFT 1908 are both connected to the electric current supply line 1904, and a second electrode of the TFT 1908 is connected to an anode of the EL element 1910. The storage capacitor 1909 is connected between the gate electrodes of the TFTs 1907 and 1908, and the second electrode of the TFT 1907 and the first electrode of the TFT 1908. The storage capacitor 1909 stores the voltage between a gate and a source of the TFT 1907 and the voltage between a gate and a source of the TFT 1908. Predetermined electric potentials are input to the electric current supply line 1904 and a cathode of the EL element 1910, which thus have a mutual electric potential difference.
Operation from write-in of a signal electric current through light emission is explained using FIGS. 20A to 20E. Reference numerals used within the figures denoting each portion are based on those of FIG. 19. FIGS. 20A to 20C show electric current flow schematically. FIG. 20D shows the relationship between the electric currents flowing in each pathway during write-in of the signal electric current, and FIG. 20E shows the voltage accumulating in the storage capacitor 1909 during the same write-in of the signal electric current, namely the voltage between the gate and the source of the TFTs 1907 and 1908.
First, pulses are input to the first gate signal line 1902 and the second gate signal line 1903, and the TFTs 1905 and 1906 turn on. The electric current flowing in the source signal line 1901 at this point, namely the signal electric current, is taken as Idata.
The electric current Idata flows in the source signal line 1901, and therefore the electric current path within the pixel is divided into I1 and I2, as shown in FIG. 20A. The relationship between the two is shown in FIG. 20D. Note that Idata=I1+I2.
Electric charge is not yet stored in the storage capacitor 1909 at the instant when the TFT 1905 turns on, and therefore the TFTs 1907 and 1908 are off. Consequently, I2=0, and Idata=I1. That is, electric current only flows due to the accumulation of electric charge in the storage capacitor 1909 during this period.
Electric charge then accumulates gradually in the storage capacitor 1909, and an electric potential difference starts to develop between both electrodes (see FIG. 20E). The TFT 1907 turns on when the electric potential difference between both electrodes reaches Vth (point A in FIG. 20E), and I2 develops. Idata=I1+I2, as discussed above, and therefore I1 is gradually reduced. Electric current still flows, and in addition, electric charge accumulates in the storage capacitor.
The TFT 1907 is on here, and the TFT 1908 is also on, and electric current begins to flow. However, this electric current flows in an independent path as shown in FIG. 20A, and therefore the value of Idata does not change, and there is also no influence on I1 and I2.
Electric charge continues to accumulate in the storage capacitor 1909 until the electric potential difference between both electrodes in the storage capacitor 1909, namely the voltage between the gates and the sources of the TFTs 1907 and 1908, becomes a desired voltage, that is, becomes a voltage (VGS) at which the TFT 1907 causes as much as possible for the electric current Idata to flow. When the accumulation of electric charge is then complete (point B in FIG. 20E), the electric current I1 stops flowing, and in addition, an electric current corresponding to VGS flows in the TFT 1907 at this point, and Idata=I2 (see FIG. 20B). Signal write-in operations are thus complete. Selection of the first gate signal line 1902 and the second gate signal line 1903 is finally completed, and the TFTs 1905 and 1906 turn off.
An electric charge is stored in the storage capacitor 1909 at this point such that the flow of the electric current Idata in the TFT 1907 will impart as much voltage as possible between the gate and the source. The TFTs 1907 and 1908 form a current mirror, and therefore this voltage is also imparted to the TFT 1908 and electric current flows in the TFT 1908. This electric current is denoted by reference symbol IEL in FIGS. 20A to 20E.
IEL=Idata provided that the gate length and the channel width of the TFT 1907 and the TFT 1908 are equal. That is, the relationship between the signal electric current Idata and the electric current IEL flowing in the EL element can be determined by the method of determining the size of the TFTs 1907 and 1908 structuring the current mirror.
A merit of the electric current write-in shown in the above example is that a voltage between the gate and the source necessary for making the electric current Idata flow is stored in the storage capacitor 610, even for cases in which there is dispersion in the characteristics of the TFT 608 and the like. A desired electric current can therefore be accurately supplied to the EL element, and consequently it becomes possible to control dispersions in brightness caused by dispersion in the TFT characteristics.
Characteristics of each structure are shown in Table 1.
TABLE 11st structure (FIG. 6)2nd structure (FIG. 17)3rd structure (FIG. 19)relationship betweenIdata = IELIdata = IELIdata ≠ IELsignal current Idata andcurrent IEL flowing in EL elementrelationship betweenconverter TFT: 608converter TFT: 1709converter TFT: 1907current-voltage converter TFTdriver TFT: 608 → commondriver TFT: 1709 → commondriver TFT: 1908and driver TFTsignal current in write-in periodcurrent doesn't flowcurrent flows in EL elementcurrent doesn't flowin EL elementin EL elementnumbers of gate signal line332
First, consider the relationship between the signal electric current Idata and the electric current IEL flowing in the EL element. Gray scales are expressed by the value of the electric current in semiconductor devices using an analog gray scale method, and therefore a large current flows for a high gray scale, and a small amount of current flows for a low gray scale. That is, the size of the write-in signal electric current differs by gray scale. In this case, a longer amount of time is thus needed for writing low gray scale signals into the pixels than for writing high gray scale signals into the pixels. Further, the current is small for low gray scale signals, and therefore they are very easily influenced by noise.
Next, consider the relationship between a current-voltage converter TFT, and a driver TFT. The current-voltage converter TFT is a TFT used for converting the signal electric current input from the source signal line into a voltage signal, and the driver TFT is a TFT for making current flow in accordance with the voltage stored in the storage capacitor. Figure numbers for the current-voltage converter TFT (denoted as converter TFT) and the driver TFT for each structure are shown in Table 1.
The fact that the converter TFT and the driver TFT are common means that common TFTs are used for write-in and light emission operations. The influence due to TFT dispersion is therefore small. On the other hand, for cases in which the converter TFT and the driver TFT are different, as shown in the third structure, there is influence due to dispersion in the characteristics within the pixels.
Consider the signal electric current pathways next. The signal electric current flows from the electric current source to the electric current supply line, or from the electric current supply line to the electric current source, in the first structure and the third structure. On the other hand, the signal electric current flows from the electric current source through the EL element when the signal electric current is written in when using the second structure. The EL element itself becomes a load with this type of structure for cases in which a high gray scale signal is written in after the write-in of a low gray scale signal, and for cases in which the opposite operations are performed, and therefore it becomes necessary to lengthen the write-in time.
Furthermore, pixel control is performed using three gate signal lines per row of pixels for the first and the second structures, and therefore the aperture ratio is greatly reduced compared to a conventional semiconductor device.